M5249C3 dBUG
Firmware Date    : Mar 4, 2003
Current Firmware : v3a.1b.1c 
Build            : 4

Ver #.          Build/Date      Description
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v3a.1b.1c		Build 4			Corrected UPUSER command -- user now has 
				Mar 4, 2003		access to full "User Flash" range 
								(0xFFE40000->0xFFFFFFFF).
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v3a.1b.1b       Build 3         1. Corrected MMAP command to reflect correct CS 
                Sep 26, 2002       and memory map. 
                                2. Swapped base address for SRAM0 and SRAM1 so 
                                   that the internal SRAM will be continuous 
                                   from 0x20000000-0x20018000.
								3. Added GPIO toggle to flash board LEDs on
                                   initialization.
                                4. Correct "odd byte" transmission error in
                                   ethernet driver. 
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v2e.1a.1c       Build 2         1. Fixed "User" stack pointer to point to the 
                Jul 01, 2002       top of SDRAM.
                                2. Added IDECONFIG1 = 0x00000020 in the 
                                   initialization routine to "work-around" 
                                   Ethernet PAL(U5) program bug. *   
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v2e.1a.1c       Build 1
                Mar 29, 2002    Initial Release

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* In Rev 1.1 of the M5249C3 there is a small timing bug in the PAL(U5) equations 
  that has to do with the address setup time for the LAN91C111 (ethernet). This
  can be fixed by updating the PAL(U5) equations with the one provided along 
  with this dBUG update (M5249C3_U5_R1.1.jed). You can reprogram the PAL with a
  Lattice isp programming cable or a stand-alone PAL programmer. (Free isp 
  programming software available from www.latticesemi.com)
 
  Starting in build 2 of the "M5249C3 dBUG ROM Monitor" this timing bug is 
  "worked-around" by writing the IDEConfig1 register with the value 0x00000020. 
  This will delay CS1 by one clock on each access to the SMSC part and will 
  solve the problem without updating the PAL(U5) equations.

  If you are using the ethernet on the M5249C3 board with your own code
  (including uClinux!) and do not have a way of reprogramming the PAL, add the
  following line of code to your initialization sequence before you access the
  LAN91C111:

        /* Write IDEConfig1 = 0x00000020 to delay CS1 one clock */
        /* assuming MBAR2 at = 0x800000000 */

        *((void*)0x80000020) = 0x00000020;